From 8fee9951d30d03b4bca16c198b887c5415418c12 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 29 Jan 2021 23:14:53 +0200 Subject: sb,soc/intel: Add wake source fields in GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For the moment, these are most not used but become a necessity for a unified approach. They would be required for the implementation of _SWS method for OSPM to determine the reason for system waking up. The related hardware registers are present with these platforms. It's expected that ACPI power-management related GNVS entries are grouped together to form a single struct in later works. Change-Id: I6d31d39ac1017cd6fdf0ac66b418d1fbb1edf8e0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50193 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/southbridge/intel/lynxpoint/include/soc/nvs.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/southbridge/intel/lynxpoint/include/soc/nvs.h') diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h index 17ded13589..7db206e6e9 100644 --- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h +++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h @@ -73,6 +73,10 @@ struct __packed global_nvs { u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ + + /* Required for future unified acpi_save_wake_source. */ + u32 pm1i; + u32 gpei; }; #endif /* SOUTHBRIDGE_INTEL_LYNXPOINT_NVS_H */ -- cgit v1.2.3