From 66c6413c69abb7335efc4ea07f4c811c042704b6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 19 Dec 2020 16:19:44 +0200 Subject: ACPI: Refactor ChromeOS specific ACPI GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The layout of GNVS has expectation for a fixed size array for chromeos_acpi_t. This allows us to reduce the exposure of . If chromeos_acpi_t was the last entry in struct global_nvs padding at the end is also removed. If device_nvs_t exists, place a properly sized reserve for chromeos_acpi_t in the middle. Allocation from cbmem is adjusted such that it matches exactly the OperationRegion size defined inside the ASL. Change-Id: If234075e11335ce958ce136dd3fe162f7e5afdf7 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48788 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/southbridge/intel/lynxpoint/include/soc/nvs.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/southbridge/intel/lynxpoint/include/soc/nvs.h') diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h index 154e285a4a..aa35ea05a5 100644 --- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h +++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h @@ -3,9 +3,7 @@ #ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_NVS_H #define SOUTHBRIDGE_INTEL_LYNXPOINT_NVS_H -#include #include -#include "vendorcode/google/chromeos/gnvs.h" struct __packed global_nvs { /* Miscellaneous */ @@ -75,12 +73,6 @@ struct __packed global_nvs { u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ - u8 rsvd6[92]; - - /* ChromeOS specific (starts at 0x100)*/ - chromeos_acpi_t chromeos; }; -check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); - #endif /* SOUTHBRIDGE_INTEL_LYNXPOINT_NVS_H */ -- cgit v1.2.3