From 8084b3856852f3fb3905e0fe4957b08518095d38 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 30 Oct 2020 10:56:31 +0100 Subject: sb/intel/lynxpoint/sata: Always use AHCI mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The other two modes are not used by any mainboard, and the code seems to be copied from older southbridges. As the code looks incorrect, drop it. Change-Id: I374546279a85cead1aea13e0952bbfd6f643a75b Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/47022 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/southbridge/intel/lynxpoint/chip.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/southbridge/intel/lynxpoint/chip.h') diff --git a/src/southbridge/intel/lynxpoint/chip.h b/src/southbridge/intel/lynxpoint/chip.h index 40d0460419..89bbb1ce0c 100644 --- a/src/southbridge/intel/lynxpoint/chip.h +++ b/src/southbridge/intel/lynxpoint/chip.h @@ -38,9 +38,7 @@ struct southbridge_intel_lynxpoint_config { uint32_t gpe0_en_4; uint32_t alt_gp_smi_en; - /* IDE configuration */ - uint32_t ide_legacy_combined; - uint32_t sata_ahci; + /* SATA configuration */ uint8_t sata_port_map; uint32_t sata_port0_gen3_tx; uint32_t sata_port1_gen3_tx; -- cgit v1.2.3