From 4bdc4aa297150f4b8913f43df8286671886aca3e Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Wed, 19 Jun 2013 10:49:29 -0700 Subject: lynxpoint: Fix LPT-LP PME_B0 bit offset in ACPI _PRW objects LynxPoint-LP has a lot of GPEs and the "default" set has been moved to register 4 starting at bit offset 96. This means that PME_B0 bit in GPE0_EN/GPE0_STS is now bit 109 in LPT-LP but still bit 13 in LPT-H. suspend on falco and wake from usb 4 | 2013-06-19 10:49:17 | ACPI Enter | S3 5 | 2013-06-19 10:49:22 | ACPI Wake | S3 6 | 2013-06-19 10:49:22 | Wake Source | Internal PME | 0 Change-Id: I443cd4d17796888debed70c0bda27ae09accd09b Signed-off-by: Duncan Laurie Reviewed-on: https://gerrit.chromium.org/gerrit/59265 Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/4253 Reviewed-by: Ronald G. Minnich Tested-by: build bot (Jenkins) --- src/southbridge/intel/lynxpoint/acpi/audio.asl | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'src/southbridge/intel/lynxpoint/acpi/audio.asl') diff --git a/src/southbridge/intel/lynxpoint/acpi/audio.asl b/src/southbridge/intel/lynxpoint/acpi/audio.asl index a4553289f2..2bc11686fd 100644 --- a/src/southbridge/intel/lynxpoint/acpi/audio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/audio.asl @@ -27,10 +27,15 @@ Device (HDEF) { Name (_ADR, 0x001b0000) - // Power Resources for Wake - Name (_PRW, Package(){ - 13, // Bit 13 of GPE - 4 // Can wake from S4 state. - }) + Name (PRWH, Package(){ 0x0d, 3 }) // LPT-H + Name (PRWL, Package(){ 0x6d, 3 }) // LPT-LP + + Method (_PRW, 0) { // Power Resources for Wake + If (\ISLP ()) { + Return (PRWL) + } Else { + Return (PRWH) + } + } } -- cgit v1.2.3