From c3ed88636a3533b97cef5bcb445cbe61edbfae7f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 19 Jun 2014 19:50:51 +0300 Subject: intel boards: Use acpi_is_wakeup_s3() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Icab0aeb2d5bf19b4029ca29b8a1e7564ef59a538 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6071 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Patrick Georgi --- src/southbridge/intel/ibexpeak/lpc.c | 2 +- src/southbridge/intel/ibexpeak/me.c | 5 +---- 2 files changed, 2 insertions(+), 5 deletions(-) (limited to 'src/southbridge/intel/ibexpeak') diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index dca46014d3..ef9a632dde 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -438,7 +438,7 @@ static void pch_lock_smm(struct device *dev) u8 reg8; #endif - if (acpi_slp_type != 3) { + if (!acpi_is_wakeup_s3()) { #if ENABLE_ACPI_MODE_IN_COREBOOT printk(BIOS_DEBUG, "Enabling ACPI via APMC:\n"); outb(0xe1, 0xb2); // Enable ACPI mode diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 0e1b5b8920..3130631a77 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -436,12 +436,9 @@ static me_bios_path intel_me_path(device_t dev) struct me_hfs hfs; struct me_gmes gmes; -#if CONFIG_HAVE_ACPI_RESUME /* S3 wake skips all MKHI messages */ - if (acpi_slp_type == 3) { + if (acpi_is_wakeup_s3()) return ME_S3WAKE_BIOS_PATH; - } -#endif pci_read_dword_ptr(dev, &hfs, PCI_ME_HFS); pci_read_dword_ptr(dev, &gmes, PCI_ME_GMES); -- cgit v1.2.3