From 24bc05d7971cebcccc73a31b837fe43e9bea1938 Mon Sep 17 00:00:00 2001 From: Keith Hui Date: Tue, 16 Apr 2024 09:45:12 -0400 Subject: sb/intel/ibexpeak: Drop USB3 settings from devicetree ibexpeak has no USB 3 capabilities. They were kept briefly when its devicetree structure was split from bd82x6x in commit ab4de83f4330 ("sb/intel/ibexpeak: Sever bd82x6x source dependency") to verify correctness. With that done, they can go. Change-Id: I6b847e1532d2e84a7b408a8858c8613b322d0373 Signed-off-by: Keith Hui Reviewed-on: https://review.coreboot.org/c/coreboot/+/81930 Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer --- src/southbridge/intel/ibexpeak/chip.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'src/southbridge/intel/ibexpeak') diff --git a/src/southbridge/intel/ibexpeak/chip.h b/src/southbridge/intel/ibexpeak/chip.h index aba27ccca8..dc97da3283 100644 --- a/src/southbridge/intel/ibexpeak/chip.h +++ b/src/southbridge/intel/ibexpeak/chip.h @@ -68,12 +68,6 @@ struct southbridge_intel_ibexpeak_config { bool pcie_hotplug_map[8]; - /* These USB3 fields, copied from bd82x6x, don't apply here, - * as Ibex Peak doesn't have USB3. */ - uint32_t xhci_switchable_ports; - uint32_t superspeed_capable_ports; - uint32_t xhci_overcurrent_mapping; - uint32_t spi_uvscc; uint32_t spi_lvscc; struct intel_swseq_spi_config spi; -- cgit v1.2.3