From 1cae45432e90488c2e9e9ce635fece26ca4c2268 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Mon, 6 Jan 2020 12:31:34 +0200
Subject: device,sb/intel: Move SMBus host controller prototypes
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Also change some of the types to match the register widths
of the controller. It is expected that these prototypes
will be used with SMBus host controllers inside AMD chipsets
as well, thus the change of location.

Change-Id: I88fe834f3eee7b7bfeff02f91a1c25bb5aee9b65
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38226
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/intel/ibexpeak/early_smbus.c | 1 +
 src/southbridge/intel/ibexpeak/smbus.c       | 1 +
 2 files changed, 2 insertions(+)

(limited to 'src/southbridge/intel/ibexpeak')

diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c
index bd130c0a99..0d18ed0b7c 100644
--- a/src/southbridge/intel/ibexpeak/early_smbus.c
+++ b/src/southbridge/intel/ibexpeak/early_smbus.c
@@ -19,6 +19,7 @@
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 void enable_smbus(void)
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index dd3abfe60c..9168cffb24 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -22,6 +22,7 @@
 #include <device/pci_ops.h>
 #include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
+#include <device/smbus_host.h>
 #include "pch.h"
 
 static void pch_smbus_init(struct device *dev)
-- 
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