From 90e9f5472680bbc44fe4e23b390a9323f8c59643 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 1 Jun 2020 19:31:53 +0200 Subject: ironlake/ibexpeak: Move early_smbus.c to common code We will update the other platforms to use this common code in susbsequent commits. While we are at it, reflow a broken line, define the SMBus PCI device in the header and fix whitespace. Change-Id: I1fdff2feead4165f02b24cb948d8c03318969014 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41999 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/southbridge/intel/ibexpeak/early_smbus.c | 34 ---------------------------- 1 file changed, 34 deletions(-) delete mode 100644 src/southbridge/intel/ibexpeak/early_smbus.c (limited to 'src/southbridge/intel/ibexpeak/early_smbus.c') diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c deleted file mode 100644 index 85f20a745c..0000000000 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include "pch.h" - -uintptr_t smbus_base(void) -{ - return CONFIG_FIXED_SMBUS_IO_BASE; -} - -int smbus_enable_iobar(uintptr_t base) -{ - /* Set the SMBus device statically. */ - pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); - - /* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) - return -1; - - /* Set SMBus I/O base. */ - pci_write_config32(dev, SMB_BASE, - base | PCI_BASE_ADDRESS_SPACE_IO); - - /* Set SMBus enable. */ - pci_write_config8(dev, HOSTC, HST_EN); - - /* Set SMBus I/O space enable. */ - pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - - return 0; -} -- cgit v1.2.3