From e99bd105af97ad905114bd76ae09326a10def8cf Mon Sep 17 00:00:00 2001 From: Corey Osgood Date: Thu, 14 Jun 2007 06:10:57 +0000 Subject: This patch adds support for the Intel i82810 northbridge and various i82801xx southbridges, along with the Asus MEW-VM. With this, my machine attempts to boot linux, but does so very slowly and fails during the boot process, probably because of the irq tables. Signed-off-by: Corey Osgood Acked-by: Joseph Smith Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82801xx/cmos_failover.c | 32 ++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 src/southbridge/intel/i82801xx/cmos_failover.c (limited to 'src/southbridge/intel/i82801xx/cmos_failover.c') diff --git a/src/southbridge/intel/i82801xx/cmos_failover.c b/src/southbridge/intel/i82801xx/cmos_failover.c new file mode 100644 index 0000000000..2e1d84adb8 --- /dev/null +++ b/src/southbridge/intel/i82801xx/cmos_failover.c @@ -0,0 +1,32 @@ +/* + * This file is part of the LinuxBIOS project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "i82801xx.h" + +static void check_cmos_failed(void) +{ + uint8_t byte; + byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3); + if( byte & RTC_FAILED) { + //clear bit 1 and bit 2 + byte = cmos_read(RTC_BOOT_BYTE); + byte &= 0x0c; + byte |= MAX_REBOOT_CNT << 4; + cmos_write(byte, RTC_BOOT_BYTE); + } +} -- cgit v1.2.3