From e99bd105af97ad905114bd76ae09326a10def8cf Mon Sep 17 00:00:00 2001 From: Corey Osgood Date: Thu, 14 Jun 2007 06:10:57 +0000 Subject: This patch adds support for the Intel i82810 northbridge and various i82801xx southbridges, along with the Asus MEW-VM. With this, my machine attempts to boot linux, but does so very slowly and fails during the boot process, probably because of the irq tables. Signed-off-by: Corey Osgood Acked-by: Joseph Smith Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82801xx/chip.h | 39 +++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 src/southbridge/intel/i82801xx/chip.h (limited to 'src/southbridge/intel/i82801xx/chip.h') diff --git a/src/southbridge/intel/i82801xx/chip.h b/src/southbridge/intel/i82801xx/chip.h new file mode 100644 index 0000000000..3c1a3fd6d9 --- /dev/null +++ b/src/southbridge/intel/i82801xx/chip.h @@ -0,0 +1,39 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Corey Osgood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef IGNORE_I82801XX_DEVICE_LIST +#warning "The i82801xx code currently supports, on a testing/experimental basis," +#warning "these devices:" +#warning "i82801aa, i82801ab, i82801ba, i82801ca, i82801db, i82801dbm, i82801eb," +#warning "and i82801er." +#warning "Using this without modification on any other i82801 version will probably" +#warning "work until ram init, but will fail after that" +#endif + +#ifndef SOUTHBRIDGE_INTEL_I82801XX_CHIP_H +#define SOUTHBRIDGE_INTEL_I82801XX_CHIP_H + +struct southbridge_intel_i82801xx_config +{ +}; + +extern struct chip_operations southbridge_intel_i82801xx_ops; + +#endif /* SOUTHBRIDGE_INTEL_I82801XX_CHIP_H */ -- cgit v1.2.3