From 2048cb43863f014fedc4ff44233d49410f0cee5e Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 8 Jun 2020 02:09:33 +0200 Subject: sb/intel/i82801jx: Use PCI bitwise ops Tested with BUILD_TIMELESS=1, Intel DG43GT does not change. Change-Id: Ifd5b8cd7644811a56afae82468c8eb0a7b6b7ff9 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/42157 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82801jx/sata.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/southbridge/intel/i82801jx/sata.c') diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index b79b2be366..73a7d82bd3 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -199,8 +199,7 @@ static void sata_init(struct device *const dev) if (is_mobile && config->sata_traffic_monitor) { struct device *const lpc_dev = pcidev_on_root(0x1f, 0); - if (((pci_read_config8(lpc_dev, D31F0_CxSTATE_CNF) - >> 3) & 3) == 3) { + if (((pci_read_config8(lpc_dev, D31F0_CxSTATE_CNF) >> 3) & 3) == 3) { u8 reg8 = pci_read_config8(dev, 0x9c); reg8 &= ~(0x1f << 2); reg8 |= 3 << 2; -- cgit v1.2.3