From 44da9e73c79edea8a2e7785ecf481b3eb23f813c Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 9 Oct 2019 12:32:16 +0300 Subject: sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditional MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make these more consistent with later platforms. Followups will do a more complete refactoring of set_acpi_mode() implementations. Change-Id: I6a05b7600ebdc49915157eaff229459a1eea754c Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/36790 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/southbridge/intel/i82801jx/lpc.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'src/southbridge/intel/i82801jx/lpc.c') diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 3e11a0887a..a594452e04 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -372,13 +372,15 @@ static void enable_clock_gating(void) static void i82801jx_set_acpi_mode(struct device *dev) { - if (!acpi_is_wakeup_s3()) { - printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); - outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode - printk(BIOS_DEBUG, "done.\n"); - } else { - printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n"); - outb(APM_CNT_ACPI_ENABLE, APM_CNT); + if (CONFIG(HAVE_SMI_HANDLER)) { + if (!acpi_is_wakeup_s3()) { + printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); + outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode + printk(BIOS_DEBUG, "done.\n"); + } else { + printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n"); + outb(APM_CNT_ACPI_ENABLE, APM_CNT); + } } } @@ -422,8 +424,7 @@ static void lpc_init(struct device *dev) /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); - if (CONFIG(HAVE_SMI_HANDLER)) - i82801jx_set_acpi_mode(dev); + i82801jx_set_acpi_mode(dev); } unsigned long acpi_fill_madt(unsigned long current) -- cgit v1.2.3