From 27387c3cf5c681b1f52fd45ebe232df593e5d052 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 21 Jun 2020 16:18:27 +0200
Subject: sb/intel/i82801jx: Drop `c3_latency`

The three mainboards using this southbridge do not define it. Note that
the default value of zero might be wrong, so add a FIXME comment.

Change-Id: Id16bb12a4628daf311bddf7e4701fc480d6b18e5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
 src/southbridge/intel/i82801jx/chip.h | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src/southbridge/intel/i82801jx/chip.h')

diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index 028d5c8bf0..ba8d007fb7 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -48,7 +48,6 @@ struct southbridge_intel_i82801jx_config {
 	int c4onc3_enable:1;
 	int c5_enable : 1;
 	int c6_enable : 1;
-	int c3_latency;
 	int docking_supported:1;
 
 	int throttle_duty : 3;
-- 
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