From 349e08535a7666cabe52ebc331e3bce5468b786b Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 9 Apr 2017 20:48:37 +0200 Subject: sb/intel/i82801jx: Add correct PCI ids and change names Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19249 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/southbridge/intel/i82801jx/acpi/lpc.asl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/intel/i82801jx/acpi/lpc.asl') diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index 9d27b0b482..1d9e54e237 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -170,8 +170,8 @@ Device (LPCB) IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI IO (Decode16, 0x800, 0x800, 0x1, 0x10) // ACPI I/O trap - IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH9 ACPI - IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH9 GPIO + IO (Decode16, DEFAULT_PMBASE, DEFAULT_PMBASE, 0x1, 0x80) // ICH10 ACPI + IO (Decode16, DEFAULT_GPIOBASE, DEFAULT_GPIOBASE, 0x1, 0x40) // ICH10 GPIO }) } -- cgit v1.2.3