From 959dfc1261074e50404cb1d435729c62a054ddb9 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Sun, 11 Jun 2017 17:05:17 +0200 Subject: sb/intel/*/nvs: Rename register Rename register to match recent intel models. Required for Lenovo H8 to operate on all generations. Change-Id: I48a869adb1da2e33156968c4b7597edf99902c1a Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/21158 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/southbridge/intel/i82801ix/acpi/globalnvs.asl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/intel/i82801ix/acpi') diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl index df8306441a..97d9fa9f82 100644 --- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl @@ -51,11 +51,11 @@ Field (GNVS, ByteAcc, NoLock, Preserve) /* Thermal policy */ Offset (0x14), ACTT, 8, // 0x14 - active trip point - PSVT, 8, // 0x15 - passive trip point + TPSV, 8, // 0x15 - passive trip point TC1V, 8, // 0x16 - passive trip point TC1 TC2V, 8, // 0x17 - passive trip point TC2 TSPV, 8, // 0x18 - passive trip point TSP - CRTT, 8, // 0x19 - critical trip point + TCRT, 8, // 0x19 - critical trip point DTSE, 8, // 0x1a - Digital Thermal Sensor enable DTS1, 8, // 0x1b - DT sensor 1 DTS2, 8, // 0x1c - DT sensor 2 -- cgit v1.2.3