From b236352281405c3a6860b51af8acfd2e78c45e78 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 11 Nov 2019 18:40:50 +0100 Subject: sb/intel/i82801gx: Add a function to set up BAR This removes some of the sb code in the nb. Change-Id: I2ab894be93f210220fa55ddd10cd48889f308e5b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36753 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes --- src/southbridge/intel/i82801gx/bootblock_gcc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/southbridge/intel/i82801gx/bootblock_gcc.c') diff --git a/src/southbridge/intel/i82801gx/bootblock_gcc.c b/src/southbridge/intel/i82801gx/bootblock_gcc.c index 063a461e43..4c464ff920 100644 --- a/src/southbridge/intel/i82801gx/bootblock_gcc.c +++ b/src/southbridge/intel/i82801gx/bootblock_gcc.c @@ -32,9 +32,7 @@ void bootblock_early_southbridge_init(void) { enable_spi_prefetch(); - /* Enable RCBA */ - pci_devfn_t lpc_dev = PCI_DEV(0, 0x1f, 0); - pci_write_config32(lpc_dev, RCBA, (uintptr_t)DEFAULT_RCBA | 1); + i82801gx_setup_bars(); /* Enable upper 128bytes of CMOS */ RCBA32(0x3400) = (1 << 2); -- cgit v1.2.3