From 62902ca45de871aa59657dd8ec1858c301595634 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 29 Nov 2016 14:13:43 +0100 Subject: sb/ich7: Use common/gpio.h to set up GPIOs This is more consistent with newer Intel targets. This a static struct so it is initialized to 0 by default. To make it more readable: * only setting to GPIO mode is made explicit; * only pins in GPIO mode are either set to input or output since this is ignored in native mode; * only output pins are set high or low, since this is read-only on input; * blink is only operational on output pins, non-blink is not set explicitly; * invert is only operational on input pins, non-invert is not set explicitly. Change-Id: I05f9c52dee78b7120b225982c040e3dcc8ee3e4e Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/17639 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Patrick Rudolph Reviewed-by: Paul Menzel --- src/southbridge/intel/i82801gx/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/intel/i82801gx/Kconfig') diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 1f22d05526..b2265c4902 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -23,6 +23,7 @@ config SOUTHBRIDGE_INTEL_I82801GX select USE_WATCHDOG_ON_BOOT select HAVE_SMI_HANDLER select COMMON_FADT + select SOUTHBRIDGE_INTEL_COMMON_GPIO if SOUTHBRIDGE_INTEL_I82801GX -- cgit v1.2.3