From b6e9021b162ebe73d67a4d75c3e304fb2727860d Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 4 Dec 2016 22:17:37 +0200 Subject: intel 82801dx/gx/ix: Commit SMM relocation code to DRAM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure relocation code reaches DRAM before issuing any SMIs. Snooping and cache coherency may have undefined behaviour as CPUs do not have uniform MTRR layout yet. Change-Id: I47a7d684e05ff8c1c2f1f6a5bf8c0bbc561d9eac Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/17712 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/southbridge/intel/i82801dx/smi.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/intel/i82801dx') diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c index e8b8ce7a62..71ef5fd8ee 100644 --- a/src/southbridge/intel/i82801dx/smi.c +++ b/src/southbridge/intel/i82801dx/smi.c @@ -252,6 +252,7 @@ static void smm_relocate(void) /* copy the SMM relocation code */ memcpy((void *)0x38000, &smm_relocation_start, &smm_relocation_end - &smm_relocation_start); + wbinvd(); printk(BIOS_DEBUG, "\n"); dump_smi_status(reset_smi_status()); -- cgit v1.2.3