From 9faae2b939d0c83632baeefe80bef1739e125018 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 14 Nov 2018 00:00:35 +0100 Subject: Kconfig: Unify power-after-failure options The newest and most useful incarnation was hiding in soc/intel/common/. We move it into the Mainboard menu and extend it with various flags to be selected to control the default and which options are visible. Also add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the boolean to int conversion into Kconfig: 0 - S5 1 - S0 2 - previous state This patch focuses on the Kconfig code. The C code could be unified as well, e.g. starting with a common enum and safe wrapper around the get_option() call. TEST=Did what-jenkins-does with and without this commit and compared binaries. Nothing changed for the default configurations. Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/29680 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/southbridge/intel/i82801dx/Kconfig | 2 ++ src/southbridge/intel/i82801dx/i82801dx.h | 4 ---- src/southbridge/intel/i82801dx/lpc.c | 2 +- src/southbridge/intel/i82801dx/smihandler.c | 2 +- 4 files changed, 4 insertions(+), 6 deletions(-) (limited to 'src/southbridge/intel/i82801dx') diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 827f6bb0f6..5670e162cf 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -22,6 +22,8 @@ config SOUTHBRIDGE_INTEL_I82801DX select HAVE_USBDEBUG select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select HAVE_POWER_STATE_AFTER_FAILURE + select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE if SOUTHBRIDGE_INTEL_I82801DX diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index 8c7da55ff1..678d5d78b9 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -45,10 +45,6 @@ int smbus_read_byte(unsigned device, unsigned address); #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 -#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL -#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON -#endif - /* * 000 = Non-combined. P0 is primary master. P1 is secondary master. * 001 = Non-combined. P0 is secondary master. P1 is primary master. diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index 925251da2a..3c74e98f59 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -103,7 +103,7 @@ static void i82801dx_power_options(struct device *dev) u32 reg32; const char *state; - int pwr_on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE; int nmi_option; /* Which state do we want to goto after g3 (power restored)? diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c index b2b4662f60..e7a9589116 100644 --- a/src/southbridge/intel/i82801dx/smihandler.c +++ b/src/southbridge/intel/i82801dx/smihandler.c @@ -276,7 +276,7 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat * CMOS or even better from GNVS. Right now it's hard * coded at compile time. */ - u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE; /* First, disable further SMIs */ reg8 = inb(pmbase + SMI_EN); -- cgit v1.2.3