From 7eb8eed460ccc8d2b9d7ad87bf165c12e894eaba Mon Sep 17 00:00:00 2001 From: Jacob Garber Date: Wed, 3 Apr 2019 09:18:32 -0600 Subject: sb/intel/{common,i82801dx}: Improve TCO debug code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Report unhandled TCO bits (previously dead code). This finishes the work done in 3e3b858 (sb/intel/ibexpeak: Update debug code to match other chips). Found-by: Coverity Scan, CID 1229598 (DEADCODE) Signed-off-by: Jacob Garber Change-Id: I65df8f3363c62b364e096368a36ba5e9e8894c13 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32179 Reviewed-by: Patrick Rudolph Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82801dx/smihandler.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/southbridge/intel/i82801dx/smihandler.c') diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c index 17bedabbbe..18dc4d8705 100644 --- a/src/southbridge/intel/i82801dx/smihandler.c +++ b/src/southbridge/intel/i82801dx/smihandler.c @@ -490,7 +490,7 @@ static void southbridge_smi_tco(unsigned int node, smm_state_save_area_t *state_ } else if (tco_sts & (1 << 3)) { /* TIMEOUT */ /* Handle TCO timeout */ printk(BIOS_DEBUG, "TCO Timeout.\n"); - } else if (!tco_sts) { + } else { dump_tco_status(tco_sts); } } -- cgit v1.2.3