From 3d0288d6767fc4b0ddeb270392a22bf1894767cd Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Sun, 4 Dec 2016 15:39:44 +0200
Subject: intel/i82801dx: Support 2MiB FWH part
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Default setting of southbridge assigned 1MiB of memory
for FWH ID 0, while 2MiB is commercially available.
Only remap IDs when large ROM is requested in case some
board uses multiple FWH parts.

Change-Id: I500425f42f755f911d84c6f94a9f3ab5a1ca0b51
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17918
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
 src/southbridge/intel/i82801dx/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/southbridge/intel/i82801dx/Kconfig')

diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig
index af8300e8ed..82db1c3752 100644
--- a/src/southbridge/intel/i82801dx/Kconfig
+++ b/src/southbridge/intel/i82801dx/Kconfig
@@ -29,4 +29,8 @@ config EHCI_BAR
 	hex
 	default 0xfef00000
 
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+	string
+	default "southbridge/intel/i82801dx/bootblock.c"
+
 endif
-- 
cgit v1.2.3