From 1607406b7c3420b564265f8c8c92f63612587bb0 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 24 May 2018 09:55:55 +0300 Subject: Remove leftover Intel i82801b support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: If85d73745ec858155c501aa637fd27a62a41dd68 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26504 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/southbridge/intel/i82801bx/early_smbus.c | 55 ---------------------------- 1 file changed, 55 deletions(-) delete mode 100644 src/southbridge/intel/i82801bx/early_smbus.c (limited to 'src/southbridge/intel/i82801bx/early_smbus.c') diff --git a/src/southbridge/intel/i82801bx/early_smbus.c b/src/southbridge/intel/i82801bx/early_smbus.c deleted file mode 100644 index 103e1a35d4..0000000000 --- a/src/southbridge/intel/i82801bx/early_smbus.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2005 Tyan Computer - * (Written by Yinghai Lu for Tyan Computer) - * Copyright (C) 2007 Corey Osgood - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include "i82801bx.h" - -void enable_smbus(void) -{ - device_t dev; - - /* Set the SMBus device statically (D31:F3). */ - dev = PCI_DEV(0x0, 0x1f, 0x3); - - /* Set SMBus I/O base. */ - pci_write_config32(dev, SMB_BASE, - SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO); - - /* Set SMBus enable. */ - pci_write_config8(dev, HOSTC, HST_EN); - - /* Set SMBus I/O space enable. */ - pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - - /* Disable interrupt generation. */ - outb(0, SMBUS_IO_BASE + SMBHSTCTL); - - /* Clear any lingering errors, so transactions can run. */ - outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); - - printk(BIOS_DEBUG, "SMBus controller enabled\n"); -} - -int smbus_read_byte(u8 device, u8 address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} -- cgit v1.2.3