From d436a4b4bc035a3756a57ae8e632e16f7a95b9c9 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Thu, 3 May 2007 08:50:37 +0000 Subject: Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB, as that is not RAM but used for other stuff. First try at PCI init added to src/mainboard/tyan/s1846/Config.lb. Use a real payload (FILO) per default now. Note: this cannot boot a payload, yet, but it gets a lot further now. Signed-off-by: Uwe Hermann Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82371eb/Config.lb | 25 +++++++++++++++++++ src/southbridge/intel/i82371eb/i82371eb.c | 32 +++++++++++++++++++++++++ src/southbridge/intel/i82371eb/i82371eb.h | 32 +++++++++++++++++++++++++ src/southbridge/intel/i82371eb/i82371eb_smbus.c | 2 +- 4 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 src/southbridge/intel/i82371eb/Config.lb create mode 100644 src/southbridge/intel/i82371eb/i82371eb.c create mode 100644 src/southbridge/intel/i82371eb/i82371eb.h (limited to 'src/southbridge/intel/i82371eb') diff --git a/src/southbridge/intel/i82371eb/Config.lb b/src/southbridge/intel/i82371eb/Config.lb new file mode 100644 index 0000000000..163e846a10 --- /dev/null +++ b/src/southbridge/intel/i82371eb/Config.lb @@ -0,0 +1,25 @@ +## +## This file is part of the LinuxBIOS project. +## +## Copyright (C) 2007 Uwe Hermann +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config chip.h + +driver i82371eb.o +driver i82371eb_smbus.o + diff --git a/src/southbridge/intel/i82371eb/i82371eb.c b/src/southbridge/intel/i82371eb/i82371eb.c new file mode 100644 index 0000000000..2073a82eee --- /dev/null +++ b/src/southbridge/intel/i82371eb/i82371eb.c @@ -0,0 +1,32 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Uwe Hermann + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include "i82371eb.h" + +void i82371eb_enable(device_t dev) +{ + /* TODO. */ +} + +struct chip_operations southbridge_intel_i82371eb_ops = { + CHIP_NAME("Intel 82371EB Southbridge") + .enable_dev = i82371eb_enable, +}; diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h new file mode 100644 index 0000000000..275eee6937 --- /dev/null +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -0,0 +1,32 @@ +/* + * This file is part of the LinuxBIOS project. + * + * Copyright (C) 2007 Uwe Hermann + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef I82371EB_H +#define I82371EB_H + +#ifndef __ROMCC__ + +#include "chip.h" + +void i82371eb_enable(device_t dev); + +#endif + +#endif /* I82371EB_H */ diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_smbus.c index 6d640b6d56..07c4bb07f0 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_smbus.c +++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.c @@ -39,5 +39,5 @@ static struct device_operations smbus_ops = { static struct pci_driver smbus_driver __pci_driver = { .ops = &smbus_ops, .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_INTEL_440BX_SMB, + .device = 0x7111, // FIXME? }; -- cgit v1.2.3