From 4787f2953cf48eadb8da5b71e85407bbe5abd8b0 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 12 Jul 2020 21:27:46 +0200 Subject: sb/intel/i82371eb: Drop unneeded PM2 settings from FADT The PM2_CNT register block is not present on this southbridge, according to comments on the code. As per the ACPI specification, version 6.3, section 4.8.1.3 (PM2 Control Register): This register block is optional, if not supported its block pointer and length contain a value of zero. Since the FADT struct defaults to zero in coreboot, we don't need to do anything to indicate PM2_CNT is not supported. So, drop unneeded values. Change-Id: Ib3ff0fd9e0725f61c38e60ba56b95e6e77b0b1ed Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43382 Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82371eb/fadt.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'src/southbridge/intel/i82371eb') diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index d08742f80c..fb3b49eb49 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -27,14 +27,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm1a_evt_blk = DEFAULT_PMBASE; fadt->pm1a_cnt_blk = DEFAULT_PMBASE + PMCNTRL; - fadt->pm2_cnt_blk = 0; fadt->pm_tmr_blk = DEFAULT_PMBASE + PMTMR; fadt->gpe0_blk = DEFAULT_PMBASE + GPSTS; /* *_len define register width in bytes */ fadt->pm1_evt_len = 4; fadt->pm1_cnt_len = 2; - fadt->pm2_cnt_len = 0; /* not supported */ fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 4; @@ -129,13 +127,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; fadt->x_pm1a_cnt_blk.addrh = 0x0; - fadt->x_pm2_cnt_blk.space_id = 1; - fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8; - fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.access_size = 0; - fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk; - fadt->x_pm2_cnt_blk.addrh = 0x0; - fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; fadt->x_pm_tmr_blk.bit_offset = 0; -- cgit v1.2.3