From 4cb85533dd14731048b65d8f2e165a271b98953e Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Sun, 27 May 2007 21:43:58 +0000 Subject: Init for the Intel 82371EB southbridge: make all ROM/BIOS regions accessible (but not writable), so that reading/loading a payload from that area can work (for instance). Signed-off-by: Uwe Hermann Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82371eb/i82371eb.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/southbridge/intel/i82371eb/i82371eb.h') diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 275eee6937..6db363b857 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -25,6 +25,8 @@ #include "chip.h" +#define XBCS 0x4e /* X-Bus Chip Select register */ + void i82371eb_enable(device_t dev); #endif -- cgit v1.2.3