From a9a5f49d8f69ed131f902f04f651ac96bd6f80cc Mon Sep 17 00:00:00 2001 From: Ed Swierk Date: Wed, 30 Apr 2008 18:29:35 +0000 Subject: By default, the Intel 3100 LPC interface enables only I/O range 0x3f8 for both serial ports, making it challenging to use COM2 for the early console. Enable the traditional I/O ranges 0x3f8 for COM1 and 0x2f8 for COM2. Signed-off-by: Ed Swierk Acked-by: Joseph Smith git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3276 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i3100/i3100_early_lpc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/intel/i3100') diff --git a/src/southbridge/intel/i3100/i3100_early_lpc.c b/src/southbridge/intel/i3100/i3100_early_lpc.c index 7afe8c1ac2..97d2b7c456 100644 --- a/src/southbridge/intel/i3100/i3100_early_lpc.c +++ b/src/southbridge/intel/i3100/i3100_early_lpc.c @@ -23,6 +23,7 @@ static void i3100_enable_superio(void) device_t dev = PCI_DEV(0x0, 0x1f, 0x0); /* Enable decoding of I/O locations for SuperIO devices */ + pci_write_config16(dev, 0x80, 0x0010); pci_write_config16(dev, 0x82, 0x340f); } -- cgit v1.2.3