From 8e23bac97ec66a49f9ddb1a4069e4e68666833fb Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 17 Aug 2019 06:47:50 +0300 Subject: intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove cases of __PRE_RAM__ and other preprocessor guards. Change-Id: Id295227df344fb209d7d5fd12e82aa450198bbb8 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34928 Reviewed-by: Furquan Shaikh Reviewed-by: David Guckian Tested-by: build bot (Jenkins) --- src/southbridge/intel/fsp_rangeley/lpc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/intel/fsp_rangeley/lpc.c') diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index d7ae8f6a11..5693bb7e99 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -33,6 +33,7 @@ #include #include #include +#include "chip.h" #include "soc.h" #include "irq.h" #include "nvs.h" -- cgit v1.2.3