From 59aa2b191b5b510e6a0567f6d2be5d1b97195c95 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 20 Jun 2015 16:17:12 -0600 Subject: southbridge/intel: Create common IFD Kconfig and Makefile We've got a lot of duplicated code to set up the IFD/ME/TXE/GBE/ETC. This is the start of creating a common interface for all of them. This also allows us to reduce the chipset dependencies for CBFS_SIZE. Change-Id: Iff08f74305d5ce545b5863915359eeb91eab0208 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/10613 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Patrick Georgi --- src/southbridge/intel/fsp_rangeley/Makefile.inc | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) (limited to 'src/southbridge/intel/fsp_rangeley/Makefile.inc') diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc index 0f9f59cdb5..1d35b54dc1 100644 --- a/src/southbridge/intel/fsp_rangeley/Makefile.inc +++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc @@ -20,9 +20,7 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_RANGELEY),y) -# Run an intermediate step when producing coreboot.rom -# that adds additional components to the final firmware -# image outside of CBFS +subdirs-y += ../common/firmware ramstage-y += soc.c ramstage-y += lpc.c @@ -39,16 +37,4 @@ romstage-y += romstage.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c - -ifeq ($(CONFIG_INCLUDE_ME),y) -INTERMEDIATE+=rangeley_add_descriptor - -rangeley_add_descriptor: $(obj)/coreboot.pre $(IFDTOOL) - printf " DD Adding Intel Firmware Descriptor\n" - dd if=$(call strip_quotes,$(CONFIG_ME_PATH))/descriptor.bin \ - of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 -endif - -PHONY += rangeley_add_descriptor - endif -- cgit v1.2.3