From 959478a763c16688d43752adbae2c76e7764da45 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Sat, 3 Oct 2015 13:49:23 -0700 Subject: Remove FSP Rangeley SOC and mohonpeak board support mohonpeak is the reference board for Rangeley. I doubt anyone uses it or cares about it. We jokingly refer to it as "Moron Peak". It's code with no known users, so we shouldn't be hauling it around for the eventuality that someone might use it in the future. Change-Id: Id3c9fc39e1b98707d96a95f2a914de6bbb31c615 Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/11790 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese --- src/southbridge/intel/fsp_rangeley/Kconfig | 63 ------------------------------ 1 file changed, 63 deletions(-) delete mode 100644 src/southbridge/intel/fsp_rangeley/Kconfig (limited to 'src/southbridge/intel/fsp_rangeley/Kconfig') diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig deleted file mode 100644 index 2c8ceacd9a..0000000000 --- a/src/southbridge/intel/fsp_rangeley/Kconfig +++ /dev/null @@ -1,63 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2011 Google Inc. -## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc. -## - -config SOUTHBRIDGE_INTEL_FSP_RANGELEY - bool - -if SOUTHBRIDGE_INTEL_FSP_RANGELEY - -config SOUTH_BRIDGE_OPTIONS # dummy - def_bool y - select IOAPIC - select HAVE_HARD_RESET - select HAVE_USBDEBUG - select USE_WATCHDOG_ON_BOOT - select PCIEXP_ASPM - select PCIEXP_COMMON_CLOCK - select SPI_FLASH - select HAVE_INTEL_FIRMWARE - -config EHCI_BAR - hex - default 0xfef00000 - -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - -config SERIRQ_CONTINUOUS_MODE - bool - default n - help - If you set this option to y, the serial IRQ machine will be - operated in continuous mode. - -config HPET_MIN_TICKS - hex - default 0x80 - -config IFD_BIN_PATH - string - depends on HAVE_IFD_BIN - default "../intel/mainboard/intel/rangeley" - help - The path and filename to the descriptor.bin file. - -endif -- cgit v1.2.3