From bddef0dae73676c44364cd9d53813144ce42198a Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 25 Sep 2017 12:21:07 +0200 Subject: sb/intel/common: Add SOUTHBRIDGE_INTEL_COMMON_SPI This introduces a Kconfig option to include common Intel SPI code. Change-Id: I970408e5656c0e8812b8609e2cc10d0bc8d8f6f2 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/21674 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/southbridge/intel/fsp_i89xx/Kconfig | 2 +- src/southbridge/intel/fsp_i89xx/Makefile.inc | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) (limited to 'src/southbridge/intel/fsp_i89xx') diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig index 67c2665e66..d0cb45c250 100644 --- a/src/southbridge/intel/fsp_i89xx/Kconfig +++ b/src/southbridge/intel/fsp_i89xx/Kconfig @@ -28,12 +28,12 @@ config SOUTH_BRIDGE_OPTIONS # dummy select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK - select SPI_FLASH select COMMON_FADT select HAVE_INTEL_FIRMWARE select NO_EARLY_BOOTBLOCK_POSTCODES select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SPI config EHCI_BAR hex diff --git a/src/southbridge/intel/fsp_i89xx/Makefile.inc b/src/southbridge/intel/fsp_i89xx/Makefile.inc index f9bbdc6d6d..d8eb06789f 100644 --- a/src/southbridge/intel/fsp_i89xx/Makefile.inc +++ b/src/southbridge/intel/fsp_i89xx/Makefile.inc @@ -26,8 +26,6 @@ ramstage-y += reset.c ramstage-y += watchdog.c ramstage-$(CONFIG_ELOG) += elog.c -ramstage-y += ../common/spi.c -smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c -- cgit v1.2.3