From c02b4fc9db3c3c1e263027382697b566127f66bb Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 22 Mar 2010 11:42:32 +0000 Subject: printk_foo -> printk(BIOS_FOO, ...) Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/esb6300/esb6300_ehci.c | 4 ++-- src/southbridge/intel/esb6300/esb6300_ide.c | 2 +- src/southbridge/intel/esb6300/esb6300_lpc.c | 2 +- src/southbridge/intel/esb6300/esb6300_sata.c | 4 ++-- src/southbridge/intel/esb6300/esb6300_uhci.c | 4 ++-- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'src/southbridge/intel/esb6300') diff --git a/src/southbridge/intel/esb6300/esb6300_ehci.c b/src/southbridge/intel/esb6300/esb6300_ehci.c index 313504866e..8c20c0325f 100644 --- a/src/southbridge/intel/esb6300/esb6300_ehci.c +++ b/src/southbridge/intel/esb6300/esb6300_ehci.c @@ -9,12 +9,12 @@ static void ehci_init(struct device *dev) { uint32_t cmd; - printk_debug("EHCI: Setting up controller.. "); + printk(BIOS_DEBUG, "EHCI: Setting up controller.. "); cmd = pci_read_config32(dev, PCI_COMMAND); pci_write_config32(dev, PCI_COMMAND, cmd | PCI_COMMAND_MASTER); - printk_debug("done.\n"); + printk(BIOS_DEBUG, "done.\n"); } static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/southbridge/intel/esb6300/esb6300_ide.c b/src/southbridge/intel/esb6300/esb6300_ide.c index eca8a3fefa..e56393722a 100644 --- a/src/southbridge/intel/esb6300/esb6300_ide.c +++ b/src/southbridge/intel/esb6300/esb6300_ide.c @@ -26,7 +26,7 @@ static void ide_init(struct device *dev) word |= (1 << 15); pci_write_config16(dev, 0x42, word); #endif - printk_debug("IDE Enabled\n"); + printk(BIOS_DEBUG, "IDE Enabled\n"); } static void esb6300_ide_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/southbridge/intel/esb6300/esb6300_lpc.c b/src/southbridge/intel/esb6300/esb6300_lpc.c index 09caeb729f..c25771aa0a 100644 --- a/src/southbridge/intel/esb6300/esb6300_lpc.c +++ b/src/southbridge/intel/esb6300/esb6300_lpc.c @@ -288,7 +288,7 @@ static void lpc_init(struct device *dev) byte |= 1; } pci_write_config8(dev, 0xa4, byte); - printk_info("set power %s after power fail\n", pwr_on?"on":"off"); + printk(BIOS_INFO, "set power %s after power fail\n", pwr_on?"on":"off"); /* Set up the PIRQ */ esb6300_pirq_init(dev); diff --git a/src/southbridge/intel/esb6300/esb6300_sata.c b/src/southbridge/intel/esb6300/esb6300_sata.c index 0bedd93a9a..c26b7c4d12 100644 --- a/src/southbridge/intel/esb6300/esb6300_sata.c +++ b/src/southbridge/intel/esb6300/esb6300_sata.c @@ -13,7 +13,7 @@ static void sata_init(struct device *dev) /* Enable SATA devices */ - printk_debug("SATA init\n"); + printk(BIOS_DEBUG, "SATA init\n"); /* SATA configuration */ pci_write_config8(dev, 0x04, 0x07); pci_write_config8(dev, 0x09, 0x8f); @@ -41,7 +41,7 @@ static void sata_init(struct device *dev) pci_write_config16(dev, 0xa0, 0x0040); pci_write_config32(dev, 0xa4, 0x00220043); - printk_debug("SATA Enabled\n"); + printk(BIOS_DEBUG, "SATA Enabled\n"); } static void esb6300_sata_set_subsystem(device_t dev, unsigned vendor, unsigned device) diff --git a/src/southbridge/intel/esb6300/esb6300_uhci.c b/src/southbridge/intel/esb6300/esb6300_uhci.c index 9184ed24e4..10b1dfa1cc 100644 --- a/src/southbridge/intel/esb6300/esb6300_uhci.c +++ b/src/southbridge/intel/esb6300/esb6300_uhci.c @@ -10,13 +10,13 @@ static void uhci_init(struct device *dev) uint32_t cmd; #if 1 - printk_debug("UHCI: Setting up controller.. "); + printk(BIOS_DEBUG, "UHCI: Setting up controller.. "); cmd = pci_read_config32(dev, PCI_COMMAND); pci_write_config32(dev, PCI_COMMAND, cmd | PCI_COMMAND_MASTER); - printk_debug("done.\n"); + printk(BIOS_DEBUG, "done.\n"); #endif } -- cgit v1.2.3