From c01a505282526a7038463e937cbec83f704a6a89 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 30 Jan 2019 09:39:23 +0200 Subject: sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Datasheets describe the used command as 'I2C Read' but adding the word 'eeprom' in between should avoid further confusion with other block commands. Followups will add a symmetrical pair of commands i2c_block_read() and i2c_block_write() that operate via I2C_EN bit and have a 32 byte size restriction on block transfers. For some hardware revision these block commands are available, while 'I2C Read' was not. Change-Id: I4494ab2985afc7f737ddacc8d706a5d5395e35cf Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/31151 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: HAOUAS Elyes Reviewed-by: Arthur Heymans --- src/southbridge/intel/common/smbus.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'src/southbridge/intel/common/smbus.c') diff --git a/src/southbridge/intel/common/smbus.c b/src/southbridge/intel/common/smbus.c index fd8b6aa8dd..a842a61222 100644 --- a/src/southbridge/intel/common/smbus.c +++ b/src/southbridge/intel/common/smbus.c @@ -363,11 +363,22 @@ int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd, } /* Only since ICH5 */ -int do_i2c_block_read(unsigned int smbus_base, u8 device, +static int has_i2c_read_command(void) +{ + if (IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82371EB) || + IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801DX)) + return 0; + return 1; +} + +int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, unsigned int offset, const unsigned int bytes, u8 *buf) { int ret; + if (!has_i2c_read_command()) + return SMBUS_ERROR; + /* Set up for a i2c block data read. * * FIXME: Address parameter changes to XMIT_READ(device) with -- cgit v1.2.3