From 6e732d34a0c1b87803925065b66076599c1e5642 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 28 Jan 2021 13:56:18 +0100 Subject: intel: Turn `DEFAULT_RCBA` into a Kconfig symbol Create `FIXED_RCBA_MMIO_BASE` and use it everywhere, except in cases where a pointer cast would be necessary. Instances in Sandy Bridge MRC code were left as-is intentionally, so as not to collide with another cleanup patch train. Tested with BUILD_TIMELESS=1, these boards remain identical: - Asus P8Z77-V LX2 - Packard Bell MS2290 Change-Id: I642958fbd6f02dbf54812d6a75d6bc3087acc77a Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50036 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/southbridge/intel/common/rcba.h | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'src/southbridge/intel/common/rcba.h') diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h index 712a477cc1..4a9847a32a 100644 --- a/src/southbridge/intel/common/rcba.h +++ b/src/southbridge/intel/common/rcba.h @@ -3,9 +3,7 @@ #ifndef SOUTHBRIDGE_INTEL_DEFAULT_RCBA_H #define SOUTHBRIDGE_INTEL_DEFAULT_RCBA_H -#ifndef __ACPI__ - -#define DEFAULT_RCBA ((u8 *)0xfed1c000) +#define DEFAULT_RCBA ((u8 *)CONFIG_FIXED_RCBA_MMIO_BASE) /* Root Complex Register Block */ #define RCBA 0xf0 @@ -23,10 +21,4 @@ #define RCBA32_AND_OR(x, and, or) RCBA_AND_OR(32, x, and, or) #define RCBA32_OR(x, or) RCBA_AND_OR(32, x, ~0UL, or) -#else - -#define DEFAULT_RCBA 0xfed1c000 - -#endif /* __ACPI__ */ - #endif /* SOUTHBRIDGE_INTEL_DEFAULT_RCBA_H */ -- cgit v1.2.3