From b6585481e8cb30ed04a1673b170af3df9e0e4320 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 1 Jun 2020 15:11:14 +0300 Subject: arch/x86: Create helper for APM_CNT SMI triggers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Attempts to write to APM_CNT IO port should always be guarded with a test to verify SMI handler has been installed. Immediate followup removes redundant HAVE_SMI_HANDLER tests. Change-Id: If3fb0f1a8b32076f1d9f3fea9f817dd4b093ad98 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/41971 Reviewed-by: Angel Pons Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/lpc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/southbridge/intel/bd82x6x') diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 5e28cd2bc2..200463268f 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -405,9 +405,7 @@ static void enable_clock_gating(struct device *dev) static void pch_set_acpi_mode(void) { if (!acpi_is_wakeup_s3() && CONFIG(HAVE_SMI_HANDLER)) { - printk(BIOS_DEBUG, "Disabling ACPI via APMC:\n"); - outb(APM_CNT_ACPI_DISABLE, APM_CNT); // Disable ACPI mode - printk(BIOS_DEBUG, "done.\n"); + apm_control(APM_CNT_ACPI_DISABLE); } } @@ -827,7 +825,7 @@ static void lpc_final(struct device *dev) if (CONFIG(HAVE_SMI_HANDLER)) { if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3()) { - outb(APM_CNT_FINALIZE, APM_CNT); + apm_control(APM_CNT_FINALIZE); } } } -- cgit v1.2.3