From 68f688896ce347f7304748b655332354dc1da778 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 11 Apr 2018 13:03:34 +0200 Subject: Revert "model_206ax: Use parallel MP init" This reverts commit 5fbe788bae15f0d24d56011e8eb8b48c107b7b05. This commit was submitted without its parent being submitted, resulting in coreboot not building. Change-Id: I87497093ccf6909b88e3a40d5f472afeb7f2c552 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/25616 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/southbridge/intel/bd82x6x/elog.c | 2 +- src/southbridge/intel/bd82x6x/pch.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'src/southbridge/intel/bd82x6x') diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c index 96098facb1..814ff80598 100644 --- a/src/southbridge/intel/bd82x6x/elog.c +++ b/src/southbridge/intel/bd82x6x/elog.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include "pch.h" void pch_log_state(void) { diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 9e87ff6b72..ebcb058c0b 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -68,6 +68,9 @@ int pch_silicon_revision(void); int pch_silicon_type(void); int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); +#if IS_ENABLED(CONFIG_ELOG) +void pch_log_state(void); +#endif #else /* __PRE_RAM__ */ void enable_smbus(void); void enable_usb_bar(void); -- cgit v1.2.3