From 26e0f4cefc9423fafc7e105796df93026026c48c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 19 Dec 2020 19:10:45 +0200 Subject: sb,soc/intel: Convert some CONFIG(CHROMEOS) preprocessor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I964f4340caa20124a15e52c055d2f27ba5113687 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48783 Reviewed-by: Angel Pons Reviewed-by: Arthur Heymans Reviewed-by: Patrick Rudolph Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/me_common.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'src/southbridge/intel/bd82x6x') diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c index ae157d36c3..422c091001 100644 --- a/src/southbridge/intel/bd82x6x/me_common.c +++ b/src/southbridge/intel/bd82x6x/me_common.c @@ -15,6 +15,8 @@ #include "me.h" #include "pch.h" +#include + /* Path that the BIOS should take based on ME state */ static const char *const me_bios_path_values[] = { [ME_NORMAL_BIOS_PATH] = "Normal", @@ -362,10 +364,6 @@ int intel_mei_setup(struct device *dev) return 0; } -#if CONFIG(CHROMEOS) -#include -#endif - /* Read the Extend register hash of ME firmware */ int intel_me_extend_valid(struct device *dev) { @@ -405,10 +403,9 @@ int intel_me_extend_valid(struct device *dev) } printk(BIOS_DEBUG, "\n"); -#if CONFIG(CHROMEOS) /* Save hash in NVS for the OS to verify */ - chromeos_set_me_hash(extend, count); -#endif + if (CONFIG(CHROMEOS)) + chromeos_set_me_hash(extend, count); return 0; } -- cgit v1.2.3