From 58a89537931cd243c6ddbb9ff435bc5862fc64b0 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Tue, 12 Jun 2018 22:58:19 +0200
Subject: Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common
 location"

In the end it does not look like RCBA register offsets are fully
compatible over southbridges.

This reverts commit d2d2aef6a3222af909183fb96dc7bc908fac3cd4.

Is squashed with revert of "sb/intel/common: Fix conflicting OIC
register definition" 8aaa00401b68e5c5b6c07b0984e3e7c3027e3c2f.

Change-Id: Icbf4db8590e60573c8c11385835e0231cf8d63e6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27038
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/southbridge/intel/bd82x6x/pch.c | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src/southbridge/intel/bd82x6x/pch.c')

diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 7ff13a0928..79cf6bf382 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -24,7 +24,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #endif
-#include <southbridge/intel/common/rcba.h>
 #include "pch.h"
 #include <string.h>
 
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