From 7f32df379cd42178a05239b6b1ced435d33d5ffa Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 2 Jun 2020 13:36:57 +0200 Subject: sb/intel/bd82x6x: Align some ME functions This eliminates the differences in the first part of the file. Change-Id: Ifb7d57da08e02664a28819e65bc8e9697ed38c4c Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/42009 Reviewed-by: HAOUAS Elyes Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/me_8.x.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'src/southbridge/intel/bd82x6x/me_8.x.c') diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index f64e29c64a..dd972d2b4e 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -25,12 +25,11 @@ #include "pch.h" #if CONFIG(CHROMEOS) -#include #include #endif /* Path that the BIOS should take based on ME state */ -static const char *me_bios_path_values[] __unused = { +static const char *me_bios_path_values[] __unused = { [ME_NORMAL_BIOS_PATH] = "Normal", [ME_S3WAKE_BIOS_PATH] = "S3 Wake", [ME_ERROR_BIOS_PATH] = "Error", @@ -38,12 +37,10 @@ static const char *me_bios_path_values[] __unused = { [ME_DISABLE_BIOS_PATH] = "Disable", [ME_FIRMWARE_UPDATE_BIOS_PATH] = "Firmware Update", }; -static int intel_me_read_mbp(me_bios_payload *mbp_data); /* MMIO base address for MEI interface */ static u32 *mei_base_address; - static void mei_dump(void *ptr, int dword, int offset, const char *type) { struct mei_csr *csr; @@ -292,7 +289,7 @@ static int mei_recv_msg(struct mkhi_header *mkhi, if (!mkhi_rsp.is_response || mkhi->group_id != mkhi_rsp.group_id || mkhi->command != mkhi_rsp.command) { - printk(BIOS_ERR, "ME: invalid response, group %u ?= %u," + printk(BIOS_ERR, "ME: invalid response, group %u ?= %u, " "command %u ?= %u, is_response %u\n", mkhi->group_id, mkhi_rsp.group_id, mkhi->command, mkhi_rsp.command, mkhi_rsp.is_response); @@ -568,6 +565,10 @@ static int intel_mei_setup(struct device *dev) return 0; } +#if CONFIG(CHROMEOS) +#include +#endif + /* Read the Extend register hash of ME firmware */ static int intel_me_extend_valid(struct device *dev) { @@ -622,6 +623,8 @@ static void intel_me_hide(struct device *dev) pch_enable(dev); } +static int intel_me_read_mbp(me_bios_payload *mbp_data); + /* Check whether ME is present and do basic init */ static void intel_me_init(struct device *dev) { -- cgit v1.2.3