From 780e02d1a54598f60f290e7eaba3c0456006ecce Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 29 Dec 2020 05:12:56 +0200 Subject: ACPI GNVS: Drop APIC, factor out MPEN MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit APIC was not referenced anywhere in ASL. MPEN has references under boards: getac/p470, roda/rk9, roda/rk886ex. MPEN has reference also in Intel SpeedStep ASL. Replace static MPEN with detection of multiple CPUs installed. Change-Id: Ib5f06416b23196b7227ccd5814162925c31c084b Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49273 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/southbridge/intel/bd82x6x/include/soc/nvs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/intel/bd82x6x/include') diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h index 25e5b6edac..969d59209b 100644 --- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h +++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h @@ -44,8 +44,8 @@ struct __packed global_nvs { u8 tmps; /* 0x25 - Temperature Sensor ID */ u8 rsvd3[2]; /* Processor Identification */ - u8 apic; /* 0x28 - APIC enabled */ - u8 mpen; /* 0x29 - MP capable/enabled */ + u8 unused_was_apic; /* 0x28 - APIC enabled */ + u8 unused_was_mpen; /* 0x29 - MP capable/enabled */ u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */ u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */ u8 ppcm; /* 0x2c - Max. PPC state */ -- cgit v1.2.3