From 8fee9951d30d03b4bca16c198b887c5415418c12 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 29 Jan 2021 23:14:53 +0200 Subject: sb,soc/intel: Add wake source fields in GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For the moment, these are most not used but become a necessity for a unified approach. They would be required for the implementation of _SWS method for OSPM to determine the reason for system waking up. The related hardware registers are present with these platforms. It's expected that ACPI power-management related GNVS entries are grouped together to form a single struct in later works. Change-Id: I6d31d39ac1017cd6fdf0ac66b418d1fbb1edf8e0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50193 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/include/soc/nvs.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/southbridge/intel/bd82x6x/include/soc') diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h index 969d59209b..1c33b0cd73 100644 --- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h +++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h @@ -97,7 +97,11 @@ struct __packed global_nvs { u8 rsvd11[6]; /* XHCI */ u8 xhci; - u8 rsvd12[65]; + + /* Required for future unified acpi_save_wake_source. */ + u32 pm1i; + u32 gpei; + u8 rsvd12[57]; u8 tpiq; /* 0xf5 - trackpad IRQ value */ u32 cbmc; -- cgit v1.2.3