From 4b2464fc90d60f01b0d890e1a0dc6dcdbd119617 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 23 Feb 2022 17:54:20 +0100 Subject: arch/x86: factor out and commonize HPET_BASE_ADDRESS definition All x86 chipsets and SoCs have the HPET MMIO base address at 0xfed00000, so define this once in arch/x86 and include this wherever needed. The old AMD AGESA code in vendorcode that has its own definition is left unchanged, but sb/amd/cimx/sb800/cfg.c is changed to use the new common definition. Signed-off-by: Felix Held Change-Id: Ifc624051cc6c0f125fa154e826cfbeaf41b4de83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62304 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons Reviewed-by: Fred Reitberger --- src/southbridge/amd/cimx/sb800/cfg.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/amd') diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index 8d1139dd1f..f1ac4c920c 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include /* Include this before OEM.h to have HPET_BASE_ADDRESS from arch/x86 */ #include "SBPLATFORM.h" #include "cfg.h" #include -- cgit v1.2.3