From 065857ee7fd61b05025d7a803e82f2b9b53cbc9a Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Sat, 2 Mar 2019 18:00:29 +0200
Subject: arch/io.h: Drop unnecessary include
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Change-Id: I91158452680586ac676ea11c8589062880a31f91
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31692
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/amd/agesa/hudson/bootblock.c | 1 -
 src/southbridge/amd/agesa/hudson/hda.c       | 1 -
 src/southbridge/amd/agesa/hudson/lpc.c       | 1 -
 src/southbridge/amd/agesa/hudson/reset.c     | 1 -
 src/southbridge/amd/agesa/hudson/sata.c      | 1 -
 src/southbridge/amd/agesa/hudson/sd.c        | 1 -
 src/southbridge/amd/agesa/hudson/sm.c        | 1 -
 src/southbridge/amd/agesa/hudson/usb.c       | 1 -
 src/southbridge/amd/amd8111/bootblock.c      | 1 -
 src/southbridge/amd/amd8111/reset.c          | 1 -
 src/southbridge/amd/amd8111/smbus.c          | 1 -
 src/southbridge/amd/amd8111/usb.c            | 1 -
 src/southbridge/amd/cimx/sb800/cfg.c         | 1 -
 src/southbridge/amd/cimx/sb800/early.c       | 1 -
 src/southbridge/amd/cimx/sb800/lpc.c         | 1 -
 src/southbridge/amd/cimx/sb800/reset.c       | 1 -
 src/southbridge/amd/cimx/sb900/bootblock.c   | 1 -
 src/southbridge/amd/cimx/sb900/reset.c       | 1 -
 src/southbridge/amd/pi/hudson/bootblock.c    | 1 -
 src/southbridge/amd/pi/hudson/hda.c          | 1 -
 src/southbridge/amd/pi/hudson/lpc.c          | 1 -
 src/southbridge/amd/pi/hudson/reset.c        | 1 -
 src/southbridge/amd/pi/hudson/sata.c         | 1 -
 src/southbridge/amd/pi/hudson/sd.c           | 1 -
 src/southbridge/amd/pi/hudson/sm.c           | 1 -
 src/southbridge/amd/pi/hudson/usb.c          | 1 -
 src/southbridge/amd/rs780/cmn.c              | 1 -
 src/southbridge/amd/rs780/early_setup.c      | 1 -
 src/southbridge/amd/rs780/rs780.c            | 1 -
 src/southbridge/amd/sb700/bootblock.c        | 1 -
 src/southbridge/amd/sb700/fadt.c             | 1 -
 src/southbridge/amd/sb700/lpc.c              | 1 -
 src/southbridge/amd/sb700/smbus.h            | 1 -
 src/southbridge/amd/sb800/bootblock.c        | 1 -
 src/southbridge/amd/sb800/fadt.c             | 1 -
 src/southbridge/amd/sb800/lpc.c              | 1 -
 src/southbridge/amd/sr5650/cmn.h             | 1 -
 37 files changed, 37 deletions(-)

(limited to 'src/southbridge/amd')

diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index a10068701c..f12cec8602 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 /*
diff --git a/src/southbridge/amd/agesa/hudson/hda.c b/src/southbridge/amd/agesa/hudson/hda.c
index 2f590c76bd..1cd8953c17 100644
--- a/src/southbridge/amd/agesa/hudson/hda.c
+++ b/src/southbridge/amd/agesa/hudson/hda.c
@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <delay.h>
 #include "hudson.h"
 
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 8d07e6487e..bf231f8a47 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <pc80/i8254.h>
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c
index 64f947eb67..e3290384dc 100644
--- a/src/southbridge/amd/agesa/hudson/reset.c
+++ b/src/southbridge/amd/agesa/hudson/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c
index 7762455c9a..b08e298f06 100644
--- a/src/southbridge/amd/agesa/hudson/sata.c
+++ b/src/southbridge/amd/agesa/hudson/sata.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 
diff --git a/src/southbridge/amd/agesa/hudson/sd.c b/src/southbridge/amd/agesa/hudson/sd.c
index 878f136205..ec447ef20e 100644
--- a/src/southbridge/amd/agesa/hudson/sd.c
+++ b/src/southbridge/amd/agesa/hudson/sd.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static void sd_init(struct device *dev)
diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c
index 2cd1ff20dc..46eca33555 100644
--- a/src/southbridge/amd/agesa/hudson/sm.c
+++ b/src/southbridge/amd/agesa/hudson/sm.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
 #include <stdlib.h>
diff --git a/src/southbridge/amd/agesa/hudson/usb.c b/src/southbridge/amd/agesa/hudson/usb.c
index b17537b2cd..ec305afe27 100644
--- a/src/southbridge/amd/agesa/hudson/usb.c
+++ b/src/southbridge/amd/agesa/hudson/usb.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
index 90ba000172..40622bae75 100644
--- a/src/southbridge/amd/amd8111/bootblock.c
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <device/pci_type.h>
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c
index e1ac8a98ed..f4907c53da 100644
--- a/src/southbridge/amd/amd8111/reset.c
+++ b/src/southbridge/amd/amd8111/reset.c
@@ -14,7 +14,6 @@
 
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <reset.h>
 #include <device/pci.h>
diff --git a/src/southbridge/amd/amd8111/smbus.c b/src/southbridge/amd/amd8111/smbus.c
index 17782e2b62..aa580fecbb 100644
--- a/src/southbridge/amd/amd8111/smbus.c
+++ b/src/southbridge/amd/amd8111/smbus.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include "amd8111.h"
 
 
diff --git a/src/southbridge/amd/amd8111/usb.c b/src/southbridge/amd/amd8111/usb.c
index 5c29d7cc8b..741cad9d37 100644
--- a/src/southbridge/amd/amd8111/usb.c
+++ b/src/southbridge/amd/amd8111/usb.c
@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "amd8111.h"
 
 
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 10272166d0..4487df3787 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -17,7 +17,6 @@
 #include "cfg.h"
 #include <OEM.h>
 
-#include <arch/io.h>
 #include <arch/acpi.h>
 
 /**
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index adc69d8a16..5b19b5a1c8 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -15,7 +15,6 @@
 
 #include <stdint.h>
 #include <device/pci_ids.h>
-#include <arch/io.h>		/* inl, outl */
 #include "SBPLATFORM.h"
 #include "sb_cimx.h"
 #include "cfg.h"		/*sb800_cimx_config*/
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 8573f6fafe..a88d6d34e9 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -19,7 +19,6 @@
 #include <device/pci_def.h>
 #include <arch/ioapic.h>
 #include "lpc.h"
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 void lpc_read_resources(struct device *dev)
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index 4b96d3c8c0..787f7426ce 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c
index 734cc7a831..11faeab3d7 100644
--- a/src/southbridge/amd/cimx/sb900/bootblock.c
+++ b/src/southbridge/amd/cimx/sb900/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 static void sb900_enable_rom(void)
diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c
index 4b96d3c8c0..787f7426ce 100644
--- a/src/southbridge/amd/cimx/sb900/reset.c
+++ b/src/southbridge/amd/cimx/sb900/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c
index 0f5bdb142b..bdda5edbcc 100644
--- a/src/southbridge/amd/pi/hudson/bootblock.c
+++ b/src/southbridge/amd/pi/hudson/bootblock.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 
diff --git a/src/southbridge/amd/pi/hudson/hda.c b/src/southbridge/amd/pi/hudson/hda.c
index 879e636418..d5c92b4608 100644
--- a/src/southbridge/amd/pi/hudson/hda.c
+++ b/src/southbridge/amd/pi/hudson/hda.c
@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <delay.h>
 #include "hudson.h"
 
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 9b8753a3fe..1d504ae598 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <pc80/i8254.h>
diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c
index 64f947eb67..e3290384dc 100644
--- a/src/southbridge/amd/pi/hudson/reset.c
+++ b/src/southbridge/amd/pi/hudson/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/sata.c b/src/southbridge/amd/pi/hudson/sata.c
index d4279b2bbb..4268bc2f34 100644
--- a/src/southbridge/amd/pi/hudson/sata.c
+++ b/src/southbridge/amd/pi/hudson/sata.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 
diff --git a/src/southbridge/amd/pi/hudson/sd.c b/src/southbridge/amd/pi/hudson/sd.c
index 8bb7538b29..c4193786aa 100644
--- a/src/southbridge/amd/pi/hudson/sd.c
+++ b/src/southbridge/amd/pi/hudson/sd.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static void sd_init(struct device *dev)
diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c
index 6d1c2bcbdb..03875679b3 100644
--- a/src/southbridge/amd/pi/hudson/sm.c
+++ b/src/southbridge/amd/pi/hudson/sm.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
 #include <stdlib.h>
diff --git a/src/southbridge/amd/pi/hudson/usb.c b/src/southbridge/amd/pi/hudson/usb.c
index 9bdc22de18..f6d01062b0 100644
--- a/src/southbridge/amd/pi/hudson/usb.c
+++ b/src/southbridge/amd/pi/hudson/usb.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c
index 2ef9cd6bf2..3c79a81244 100644
--- a/src/southbridge/amd/rs780/cmn.c
+++ b/src/southbridge/amd/rs780/cmn.c
@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <arch/io.h>
 #include <arch/cpu.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c
index 0332f2f872..cccec44e56 100644
--- a/src/southbridge/amd/rs780/early_setup.c
+++ b/src/southbridge/amd/rs780/early_setup.c
@@ -14,7 +14,6 @@
  */
 
 #include <types.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <northbridge/amd/amdmct/mct/mct_d.h>
 #include <console/console.h>
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index 28e337f5d0..d2a0b16741 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <arch/io.h>
 #include <arch/acpi.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c
index ed6f2561f5..012a22cd58 100644
--- a/src/southbridge/amd/sb700/bootblock.c
+++ b/src/southbridge/amd/sb700/bootblock.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 #define IO_MEM_PORT_DECODE_ENABLE_5	0x48
diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c
index 723f0dc361..94fc5dc4a1 100644
--- a/src/southbridge/amd/sb700/fadt.c
+++ b/src/southbridge/amd/sb700/fadt.c
@@ -21,7 +21,6 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <device/device.h>
 #include <cpu/amd/powernow.h>
 #include <version.h>
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index eb0af0de1c..2ebd7a59ce 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -26,7 +26,6 @@
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <cpu/amd/powernow.h>
 #include "sb700.h"
diff --git a/src/southbridge/amd/sb700/smbus.h b/src/southbridge/amd/sb700/smbus.h
index 1b90091beb..179fbf0282 100644
--- a/src/southbridge/amd/sb700/smbus.h
+++ b/src/southbridge/amd/sb700/smbus.h
@@ -19,7 +19,6 @@
 
 #include <stdint.h>
 #include "stddef.h"
-#include <arch/io.h>
 
 #define SMBUS_IO_BASE 0xb00
 #define SMBUS_AUX_IO_BASE 0xb20
diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c
index 9062118a90..0b3486406e 100644
--- a/src/southbridge/amd/sb800/bootblock.c
+++ b/src/southbridge/amd/sb800/bootblock.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 /*
diff --git a/src/southbridge/amd/sb800/fadt.c b/src/southbridge/amd/sb800/fadt.c
index bb0a070581..eb0ea1c6e0 100644
--- a/src/southbridge/amd/sb800/fadt.c
+++ b/src/southbridge/amd/sb800/fadt.c
@@ -21,7 +21,6 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <device/device.h>
 #include <cpu/amd/powernow.h>
 #include <version.h>
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index e67dcd7464..4746f153f2 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -24,7 +24,6 @@
 #include <pc80/i8254.h>
 #include <pc80/i8259.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/acpi.h>
 #include "sb800.h"
 
diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h
index 30aeed25d6..d70e7a9c9b 100644
--- a/src/southbridge/amd/sr5650/cmn.h
+++ b/src/southbridge/amd/sr5650/cmn.h
@@ -17,7 +17,6 @@
 #ifndef __SR5650_CMN_H__
 #define __SR5650_CMN_H__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 #define NBMISC_INDEX	0x60
-- 
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