From 8a643703b87630b4346e52cac3d3acdc95ac1c70 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Tue, 23 Oct 2018 17:10:27 +0200 Subject: {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/29243 Reviewed-by: Richard Spiegel Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/southbridge/amd/sr5650/sr5650.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/amd/sr5650') diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c index 1e85c48986..0f8b265781 100644 --- a/src/southbridge/amd/sr5650/sr5650.c +++ b/src/southbridge/amd/sr5650/sr5650.c @@ -304,11 +304,11 @@ void sr5650_set_tom(struct device *nb_dev) msr_t sysmem; /* The system top memory in SR56X0. */ - sysmem = rdmsr(0xc001001A); + sysmem = rdmsr(TOP_MEM); printk(BIOS_DEBUG, "Sysmem TOM = %x_%x\n", sysmem.hi, sysmem.lo); pci_write_config32(nb_dev, 0x90, sysmem.lo); - sysmem = rdmsr(0xc001001D); + sysmem = rdmsr(TOP_MEM2); printk(BIOS_DEBUG, "Sysmem TOM2 = %x_%x\n", sysmem.hi, sysmem.lo); htiu_write_index(nb_dev, 0x31, sysmem.hi); htiu_write_index(nb_dev, 0x30, sysmem.lo | 1); -- cgit v1.2.3