From ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 31 Aug 2016 19:22:16 +0200 Subject: src/southbridge: Code formating Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16291 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/southbridge/amd/sr5650/early_setup.c | 34 ++++++++++++++++---------------- 1 file changed, 17 insertions(+), 17 deletions(-) (limited to 'src/southbridge/amd/sr5650/early_setup.c') diff --git a/src/southbridge/amd/sr5650/early_setup.c b/src/southbridge/amd/sr5650/early_setup.c index a96b127cb2..fce25ab41a 100644 --- a/src/southbridge/amd/sr5650/early_setup.c +++ b/src/southbridge/amd/sr5650/early_setup.c @@ -30,22 +30,22 @@ */ static void alink_ax_indx(u32 space, u32 axindc, u32 mask, u32 val) { - u32 tmp; - - /* read axindc to tmp */ - outl(space << 30 | space << 3 | 0x30, AB_INDX); - outl(axindc, AB_DATA); - outl(space << 30 | space << 3 | 0x34, AB_INDX); - tmp = inl(AB_DATA); - - tmp &= ~mask; - tmp |= val; - - /* write tmp */ - outl(space << 30 | space << 3 | 0x30, AB_INDX); - outl(axindc, AB_DATA); - outl(space << 30 | space << 3 | 0x34, AB_INDX); - outl(tmp, AB_DATA); + u32 tmp; + + /* read axindc to tmp */ + outl(space << 30 | space << 3 | 0x30, AB_INDX); + outl(axindc, AB_DATA); + outl(space << 30 | space << 3 | 0x34, AB_INDX); + tmp = inl(AB_DATA); + + tmp &= ~mask; + tmp |= val; + + /* write tmp */ + outl(space << 30 | space << 3 | 0x30, AB_INDX); + outl(axindc, AB_DATA); + outl(space << 30 | space << 3 | 0x34, AB_INDX); + outl(tmp, AB_DATA); } @@ -327,7 +327,7 @@ void fam10_optimization(void) /* rpr Table 5-11, 5-12 */ } #else -#define fam10_optimization() do{}while(0) +#define fam10_optimization() do {} while (0) #endif /* CONFIG_NORTHBRIDGE_AMD_AMDFAM10 || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY10 */ /***************************************** -- cgit v1.2.3