From c021ffee45f7b19b3a8e6c426e0d14a4609bf593 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Sun, 18 Sep 2016 19:18:56 +0200
Subject: southbridge/amd: Add space around operators

Change-Id: I949ff7de072e5e0753d9c8ff0bf98abfca25798b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16637
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/southbridge/amd/sb800/early_setup.c     | 8 ++++----
 src/southbridge/amd/sb800/enable_usbdebug.c | 4 ++--
 src/southbridge/amd/sb800/hda.c             | 2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'src/southbridge/amd/sb800')

diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c
index 070c1f535b..10961596e0 100644
--- a/src/southbridge/amd/sb800/early_setup.c
+++ b/src/southbridge/amd/sb800/early_setup.c
@@ -525,7 +525,7 @@ static void sb800_pmio_por_init(void)
 	byte |= 1 << 0;
 	pmio_write(0xB2, byte);
 
-	for (i=0; i<sizeof(pm_table)/sizeof(struct pm_entry); i++) {
+	for (i = 0; i < sizeof(pm_table)/sizeof(struct pm_entry); i++) {
 		byte = pmio_read(pm_table[i].port);
 		byte &= pm_table[i].mask;
 		byte |= pm_table[i].bit;
@@ -637,7 +637,7 @@ int s3_save_nvram_early(u32 dword, int size, int  nvram_pos)
 	int i;
 	printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
 
-	for (i = 0; i<size; i++) {
+	for (i = 0; i < size; i++) {
 		outb(nvram_pos, BIOSRAM_INDEX);
 		outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
 		nvram_pos++;
@@ -650,7 +650,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
 {
 	u32 data = *old_dword;
 	int i;
-	for (i = 0; i<size; i++) {
+	for (i = 0; i < size; i++) {
 		outb(nvram_pos, BIOSRAM_INDEX);
 		data &= ~(0xff << (i * 8));
 		data |= inb(BIOSRAM_DATA) << (i *8);
@@ -676,7 +676,7 @@ unsigned long get_top_of_ram(void)
 	int xnvram_pos = 0xfc, xi;
 	if (acpi_get_sleep_type() != 3)
 		return 0;
-	for (xi = 0; xi<4; xi++) {
+	for (xi = 0; xi < 4; xi++) {
 		outb(xnvram_pos, BIOSRAM_INDEX);
 		xdata &= ~(0xff << (xi * 8));
 		xdata |= inb(BIOSRAM_DATA) << (xi *8);
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index 7a52e1aa50..3959ea8013 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -26,9 +26,9 @@
 
 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
 {
-	if (hcd_idx==3)
+	if (hcd_idx == 3)
 		return PCI_DEV(0, 0x16, 2);
-	else if (hcd_idx==2)
+	else if (hcd_idx == 2)
 		return PCI_DEV(0, 0x13, 2);
 	else
 		return PCI_DEV(0, 0x12, 2);
diff --git a/src/southbridge/amd/sb800/hda.c b/src/southbridge/amd/sb800/hda.c
index 2d0852eef4..78e9862266 100644
--- a/src/southbridge/amd/sb800/hda.c
+++ b/src/southbridge/amd/sb800/hda.c
@@ -100,7 +100,7 @@ static int wait_for_ready(void *base)
 	int timeout = 50;
 
 	while (timeout--) {
-		u32 dword=read32(base +  HDA_ICII_REG);
+		u32 dword = read32(base +  HDA_ICII_REG);
 		if (!(dword & HDA_ICII_BUSY))
 			return 0;
 		udelay(1);
-- 
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