From 24d1d4b47274eb82893e6726472a991a36fce0aa Mon Sep 17 00:00:00 2001
From: Stefan Reinauer <reinauer@chromium.org>
Date: Thu, 21 Mar 2013 11:51:41 -0700
Subject: x86: Unify arch/io.h and arch/romcc_io.h

Here's the great news: From now on you don't have to worry about
hitting the right io.h include anymore. Just forget about romcc_io.h
and use io.h instead. This cleanup has a number of advantages, like
you don't have to guard device/ includes for SMM and pre RAM
anymore. This allows to get rid of a number of ifdefs and will
generally make the code more readable and understandable.

Potentially in the future some of the code in the io.h __PRE_RAM__
path should move to device.h or other device/ includes instead,
but that's another incremental change.

Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2872
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
---
 src/southbridge/amd/sb800/bootblock.c       | 1 -
 src/southbridge/amd/sb800/enable_usbdebug.c | 1 -
 src/southbridge/amd/sb800/reset.c           | 8 +++++---
 3 files changed, 5 insertions(+), 5 deletions(-)

(limited to 'src/southbridge/amd/sb800')

diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c
index 9d90a34ce0..9311b978f9 100644
--- a/src/southbridge/amd/sb800/bootblock.c
+++ b/src/southbridge/amd/sb800/bootblock.c
@@ -19,7 +19,6 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <arch/romcc_io.h>
 #include <device/pci_ids.h>
 
 /*
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index bdb4bde23c..f085eabecb 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -18,7 +18,6 @@
  */
 #include <stdint.h>
 #include <arch/io.h>
-#include <arch/romcc_io.h>
 #include <usbdebug.h>
 #include <device/pci_def.h>
 #include "sb800.h"
diff --git a/src/southbridge/amd/sb800/reset.c b/src/southbridge/amd/sb800/reset.c
index c48aaeb9af..315a065380 100644
--- a/src/southbridge/amd/sb800/reset.c
+++ b/src/southbridge/amd/sb800/reset.c
@@ -17,11 +17,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <reset.h>
+#ifndef __PRE_RAM__
+#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#endif
 #include <arch/io.h>
-#include <arch/romcc_io.h>
+#include <reset.h>
 
-#include "../../../northbridge/amd/amdk8/reset_test.c"
+#include <northbridge/amd/amdk8/reset_test.c>
 
 void hard_reset(void)
 {
-- 
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