From 19ea62e19dabdaef4032ab40e7ff9b2ac79d9b81 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Wed, 12 Dec 2018 15:11:01 +0100
Subject: southbridge: Remove useless include <device/pci_ids.h>

Change-Id: Ia640131479d4221ccd84613033f28de3932b8bff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
---
 src/southbridge/amd/sb800/bootblock.c | 1 -
 src/southbridge/amd/sb800/sb800.h     | 1 -
 2 files changed, 2 deletions(-)

(limited to 'src/southbridge/amd/sb800')

diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c
index e95d4e9ddf..b08d4775c4 100644
--- a/src/southbridge/amd/sb800/bootblock.c
+++ b/src/southbridge/amd/sb800/bootblock.c
@@ -15,7 +15,6 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <device/pci_ids.h>
 
 /*
  * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.
diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h
index a65c68a94d..3715a3ac1c 100644
--- a/src/southbridge/amd/sb800/sb800.h
+++ b/src/southbridge/amd/sb800/sb800.h
@@ -17,7 +17,6 @@
 #ifndef SB800_H
 #define SB800_H
 
-#include <device/pci_ids.h>
 #include "chip.h"
 
 /* Power management index/data registers */
-- 
cgit v1.2.3