From d4e77df5797361db39058f478ee300e9638435f9 Mon Sep 17 00:00:00 2001 From: Zheng Bao Date: Wed, 17 Mar 2010 03:10:39 +0000 Subject: The SB600 also has the BootFailTimer. We should disable it, otherwise it will keeps reboot. The comment was also added in detail to make less confusing when we debug SB600/SB700. Signed-off-by: Zheng Bao Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/sb700/sb700_early_setup.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/southbridge/amd/sb700') diff --git a/src/southbridge/amd/sb700/sb700_early_setup.c b/src/southbridge/amd/sb700/sb700_early_setup.c index b237ef0f08..a063c70cf9 100644 --- a/src/southbridge/amd/sb700/sb700_early_setup.c +++ b/src/southbridge/amd/sb700/sb700_early_setup.c @@ -102,8 +102,11 @@ static void sb700_lpc_init(void) u32 reg32; device_t dev; - /* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!! */ dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0); /* SMBUS controller */ + /* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!! + * This bit has no meaning if debug strap is not enabled. So if the + * board keeps rebooting and the code fails to reach here, we could + * disable the debug strap first. */ reg32 = pci_read_config32(dev, 0x4C); reg32 |= 1 << 31; pci_write_config32(dev, 0x4C, reg32); -- cgit v1.2.3