From 1eaaa0e446b88e0ad60c4b6f68a022a9184f1df8 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <tpearson@raptorengineeringinc.com>
Date: Fri, 14 Aug 2015 15:20:42 -0500
Subject: southbridge/amd/sr5650: Add MCFG ACPI table support

As the southbridge largely controls the PCI[e] configuration space
this patch moves the resource allocation from the northbridge
to the southbridge when the extended configuration space region
is enabled.

Change-Id: I0c4ba74ddcc727cd92b848d5d3240e6f9f392101
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12050
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
---
 src/southbridge/amd/sb700/lpc.c | 6 ------
 1 file changed, 6 deletions(-)

(limited to 'src/southbridge/amd/sb700')

diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index a71fe1fcf8..78933fadf4 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -30,12 +30,6 @@
 #include <cpu/amd/powernow.h>
 #include "sb700.h"
 
-unsigned long acpi_fill_mcfg(unsigned long current)
-{
-       /* Just a dummy */
-       return current;
-}
-
 static void lpc_init(device_t dev)
 {
 	u8 byte;
-- 
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