From 5e33e827083abe332cf404793d33fa2152a95bab Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 7 Jul 2010 21:59:06 +0000 Subject: fix some more warnings Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/rs780/rs780_gfx.c | 31 +++++++++++++++---------------- 1 file changed, 15 insertions(+), 16 deletions(-) (limited to 'src/southbridge/amd/rs780') diff --git a/src/southbridge/amd/rs780/rs780_gfx.c b/src/southbridge/amd/rs780/rs780_gfx.c index 753af0079f..7decabdac3 100644 --- a/src/southbridge/amd/rs780/rs780_gfx.c +++ b/src/southbridge/amd/rs780/rs780_gfx.c @@ -96,33 +96,33 @@ typedef struct _MMIORANGE MMIORANGE MMIO[8], CreativeMMIO[8]; +#define CIM_STATUS u32 +#define CIM_SUCCESS 0x00000000 +#define CIM_ERROR 0x80000000 +#define CIM_UNSUPPORTED 0x80000001 +#define CIM_DISABLEPORT 0x80000002 + +#define MMIO_ATTRIB_NP_ONLY 1 +#define MMIO_ATTRIB_BOTTOM_TO_TOP 1<<1 +#define MMIO_ATTRIB_SKIP_ZERO 1<<2 + +#ifdef DONT_TRUST_RESOURCE_ALLOCATION static MMIORANGE* AllocMMIO(MMIORANGE* pMMIO) { int i; - for (i=0; i<8; i++) - { + for (i=0; i<8; i++) { if (pMMIO[i].Limit == 0) return &pMMIO[i]; } return 0; } + static void FreeMMIO(MMIORANGE* pMMIO) { pMMIO->Base = 0; pMMIO->Limit = 0; } -#define CIM_STATUS u32 -#define CIM_SUCCESS 0x00000000 -#define CIM_ERROR 0x80000000 -#define CIM_UNSUPPORTED 0x80000001 -#define CIM_DISABLEPORT 0x80000002 - -#define MMIO_ATTRIB_NP_ONLY 1 -#define MMIO_ATTRIB_BOTTOM_TO_TOP 1<<1 -#define MMIO_ATTRIB_SKIP_ZERO 1<<2 - -#ifdef DONT_TRUST_RESOURCE_ALLOCATION static u32 SetMMIO(u32 Base, u32 Limit, u8 Attribute, MMIORANGE *pMMIO) { int i; @@ -584,7 +584,6 @@ static void rs780_internal_gfx_enable(device_t dev) { u32 l_dword; int i; - device_t k8_f0 = 0, k8_f2 = 0; device_t nb_dev = dev_find_slot(0, 0); msr_t sysmem; @@ -617,7 +616,7 @@ static void rs780_internal_gfx_enable(device_t dev) /* LPC DMA Deadlock workaround? */ /* GFX_InitCommon*/ - k8_f0 = dev_find_slot(0, PCI_DEVFN(0x18, 0)); + device_t k8_f0 = dev_find_slot(0, PCI_DEVFN(0x18, 0)); l_dword = pci_read_config32(k8_f0, 0x68); l_dword &= ~(3 << 21); l_dword |= (1 << 21); @@ -632,7 +631,7 @@ static void rs780_internal_gfx_enable(device_t dev) #if (CONFIG_GFXUMA == 1) /* GFX_InitUMA. */ /* Copy CPU DDR Controller to NB MC. */ - k8_f2 = dev_find_slot(0, PCI_DEVFN(0x18, 2)); + device_t k8_f2 = dev_find_slot(0, PCI_DEVFN(0x18, 2)); for (i = 0; i < 12; i++) { l_dword = pci_read_config32(k8_f2, 0x40 + i * 4); -- cgit v1.2.3